
June 1, 2026
Article 6 of the Studying TIA Portal series. Why PLC tags should be treated as a readable hardware vocabulary, not the whole software architecture: I/Q/M/DB spaces, IO mapping, symbolic names, and clean ownership boundaries.
Read more →Article 16 of the Studying SIMATIC AX series. The current tested SIMATIC AX ST compiler rejects general TRY/CATCH, so expected PLC fault conditions still need deterministic guard/report/recover logic, safe defaults, and alarm/status reporting.
Read more →Article 5 of the Studying TIA Portal series. Why Data Blocks in TIA Portal are more than storage: global DBs, instance DBs, commissioning diagnostics, start values, retention, download discipline, and the ownership rules that keep shared data readable.
Read more →A TIA Portal engineer's walk through Codesys runtime targets — why the IDE and the runtime are separate products, the free Control Win SL soft PLC, the €55 Raspberry Pi runtime, hard-real-time RTE, the OEM-embedded runtime ecosystem, and what the licensing model means in practice.
Read more →Article 15 of the Studying SIMATIC AX series. The AX scan cycle explained from the configuration.st file — what CONFIGURATION, TASK, and PROGRAM actually mean, how task priorities and interruption work, the declarative TASK→PROGRAM binding pattern versus calling OBs from OB1, multi-task patterns including a measured struct atomicity test on PLCSIM Advanced V8.0, and the complete mapping back to TIA Portal architecture.
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